1. Field of the Invention
The invention is based on the area of processing clocked digital signals, and relates to a method and a device for accurate phase switching of similar pulse trains that have different phase positions, particularly of redundant clock signals in synchronous systems.
2. Background Information
In larger synchronous systems that include digital signal processing, the plurality of provided modules must be supplied with a clock signal derived from a single source. An example of such a system is a junction in a modern telecommunications network that is operated according to CCITT standards of synchronous digital hierarchy (SDH), a so-called SDH cross-connect. Because gap-free clock supply is vital for the function of the system, this must be assured, even if a malfunction or even a failure occurs at one or another location in the system. Therefore, it is conventional to provide redundant configuration of the clock supply arrangement and other vital system elements. The doubled or even multiple signals present are distributed on different paths in the system. Cross-connections, which can be switched immediately to one of the additionally present signals in case of an error, exist at numerous locations.
Because of the different transit times, however, the similar signals present at a module--usually square-wave signals that have a fixed fundamental frequency, i.e. divalent pulse trains--have different phase positions with respect to one another. Simple switching inevitably leads to a phase jump, the consequence of which would be erroneous countings, erroneous data transfers and the like. Aside from this, direct switching between signals during the occurrence of an error without the loss of at least some pulses is not possible. It is therefore conventional to accept delays in distributing signals. For each pulse train for which time is critical and that has a setup procedure, an individual delay is established on a single module upon which the different signals impact by way of different paths, creating favorable conditions for data processing (setup and hold times of the data with respect to the clock). A delay additionally makes it possible to bridge detected errors.
A conventional means of precise distribution of a pulse train is to generate the signal to be distributed in a phase locked loop (PLL) whose command variable is the selected signal to be distributed. The PLL is slightly impaired by individual, brief errors, but nevertheless generates a gap-free signal. If a switch is made at the PLL from the one command variable to another, similar one--identical in frequency--having a different phase position, the phase jump is prevented, but a result is a longer transient oscillation to the new phase position. However, with this new phase position, the favorable conditions attained by the setup procedure are disturbed in the temporal sequence of the decisive pulse edges, and errors can occur. Particularly in clock pulse trains, changes of this type in the phase are to be avoided during switching.